Lightweight, open source state machine frameworks and free UML tools for modeling and coding UML state machines in C or C++. Designed for real-time embedded systems, QP frameworks do everything you can expect from an RTOS, only more efficiently, plus many things an RTOS can't do at all.

VHDL, Verilog, SystemC, SystemVerilog, PSL, Handel-C, Perl, Tcl/Tk training and consultancy.

FPGA CPLD and ASIC solutions that shorten time to market, improve performance and productivity, and reduce system costs compared to traditional DSP, ASSP, and ASIC products.

Altera's discussion forum for Altera products including Nios II, Quartus II, FPGAs, and CPLDs, and configuration devices. FPGA CPLD and embedded processing discussions include design troubleshooting, design support, EDA tools, Quartus licensing, DSP Builder, programmable logic, and ASIC.